1. Field of the Invention
The present invention relates to an anti-fuse memory circuit in which data of “0” and “1” are programmed in an anti-fuse element. The invention is applied to a memory circuit for storing information to identify semiconductor chips or defect address information of a memory redundancy circuit.
2. Description of the Related Art
In a conventional memory circuit using the anti-fuse, one anti-fuse element is used for storing data of 1 bit. An amount of current flowing through the anti-fuse element after it is destroyed depends on a destructive state of the element and process conditions. For this reason, even if the anti-fuse element is satisfactorily destroyed, a width of a distribution of the amount of current flowing through the destroyed element is wide. In this case, no problem arises if the center of the current amount distribution of the current flowing through the destroyed element is greatly distanced from that of the current amount distribution when the element is in a non-destructive state, viz., when little current flows therethrough. Actually, however, a difference between the amount of current flowing through the destroyed anti-fuse element and that of current flowing through the anti-fuse element not destroyed is insufficiently large. Sometimes, the current amount of the anti-fuse element being in a destructive state is equal to that in a nondestructive state. In such a case, it is impossible to normally distinguish between a destructive state and a nondestructive state, viz., “1” and “0”.
Jpn. Pat. Appln. KOKAI Publication No. 2004-22736 discloses a technology to realize a circuit realizing the writing function and the data detecting function of the anti-fuse element by using a small number of elements.